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| 5 4 3 2 1 www..com P5VIN PJ1 5V GND D U2 APL1117-33VC 3V3 AVREG GND PTmode HDDA PHYRDY 3V3 GPIO0 GPIO1 GPIO2 GPIO3 TXP TXN Vin GND 1 2 3 4 P12VIN CB3 0.1uF LED R1 1K D4 P5VIN 3 Vout 2 CB2 0.1uF CT2 22uF/10V_B R2 VBUS 4K7 R3 10K VBUS5V 1 DM 2 DP 3 4 USB1 CT1 CB1 22uF/10V_B 0.1uF VBUS4 1 G DM DP GND 3 2 G USB_TypeB 5 6 1 D 12V ATX_4P_254 U1 Power on LED 3V3 3V3 3V3 3V3 3V3 TP1 UAI TP2 UAO Reserved0 Reserved1 GND 3V3 GND AVREG GND Reserved2 Reserved3 VCCK DGND PTmode HDDA PHYRDY TME# GPIO[0] GPIO[1] GPIO[2] GPIO[3] TXP TXN 36 35 34 33 32 31 30 29 28 27 26 25 CB6 0.1uF PIN#5 CB7 0.1uF PIN#10 CT3 10uF/10V_A CB4 0.1uF PIN#16 CT4 10uF/10V_A CB5 0.1uF PIN#18 CB8 0.1uF PIN#42 37 38 39 40 41 42 43 44 45 46 47 48 Reserved[0] Reserved[1] UAI UAO Test[1] VCCO DGND VCCK Test[0] Reserved[2] Reserved[3] GPIO[18] JM20329 LQFP48 AGND AVDDL RXN RXP REXT AGND AVDDH AGNDH AVDDH DP DM XTALO 24 23 22 21 20 19 18 17 16 15 14 13 GND AVREG RXN RXP GND 3V3 GND 3V3 DP DM XTALO TXP TXN R4 12K 1% RXN RXP C1 C2 C3 C4 10nF 10nF 10nF 10nF CN1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 GND TXP TXN GND RXN RXP GND V33 V33 V33/PC GND GND GND V5/PC V5 V5 GND DAS/DSS GND V12/PC V12 V12 SATA-Femail_22P AVREG AVREG AVREG AVREG JM20329 C CB9 0.1uF PIN#9 CT5 10uF/10V_A CB10 0.1uF PIN#23 CT6 10uF/10V_A CB11 0.1uF PIN#36 CB12 0.1uF PIN#44 GND GND 3V3 GPIO7 RESETn VBUS AVREG 3V3 GND XTALI 1 2 3 4 5 6 7 8 9 10 11 12 AVREG=1V8 GPIO[22] GPIO[23] Test[2] DGND VCCO GPIO[7] RST# VBUS AVREG AVDDH AGNDH XTALI P5VIN CT7 47uF/16V C5 1uF C P12VIN CT8 47uF/16V C6 1uF Option function : Switch circuit 3V3 R_SET1 4K7 SW1 PB(2-pin) R_SET2 1K 3V3 R14 10K GPIO2 R15 10K PTmode Reserved0 R16 10K Reserved1 R7 4K7 GPIO1 R17 4K7 Reserved2 R_SET3 4K7 SW3 PB(2-pin) R_SET4 1K 3V3 Reserved3 R18 4K7 GPIO0 SW2 PB(2-pin) R8 1K 3V3 3 3 2 1 2 1 2 1 1 2 3 3 XTALI 3V3 XTALO 3V3 R6 1M R5 47K X1 RESETn 12MHz HDDA R9 300 D1 LED HDD ACTIVE LED HDDA="0" Active 3 3 B 2 1 2 1 2 1 1 2 3 3 C7 1uF C8 5pF C9 33pF 3V3 R10 300 R11 D2 4K7 LED B 3 Q1 Support EEPROM 93C46 GPIO2 R_SET1(4K7) 1-2 (PD) 2-3 (PU) R_SET2 (1K) Power On Detection Sequence. 0: Enable USB before detecting attached device. 2-3 (PU) 1: Enable USB after detecting attached device. 1-2 (PD) GPIO3 GPIO2 GPIO1 GPIO0 GPIO0 ATA power down mode 0: Enable 1: Disable 3V3 3V3 R12 300 D3 4K7 LED Q2 U3 CB13 0.1uF R13 PHYRDY 1 2 GPIO0 R_SET3(4K7) 1-2 (PD) 2-3 (PU) R_SET4(1K) 2-3 (PU) 1-2 (PD) Y93LC46_SOP8 3 Defult GPIO2 Pull High 1 2 3 4 CS VCC CLK NC DI NC/ORG DO VSS 8 7 6 5 2 One touch backup use GPIO0(SW3) If there aren't switch circuit don't care R_SET2,R8 and R_SET4 Option function : GPIO7 1 USB ACTIVE LED GPIO7="1" Active 2N3904 SATA ACTIVE LED PHYRDY="1" Active 2N3904 In ATA Power Down Mode, GPIO0 should be pull-down. A A Title Size A3 Date: 5 4 3 2 www.hxwtek.com JM20329_STANDARDSCH_LQFP48_1V0 Document Number JM20329_STANDARDSCH_LQFP48_1V0 Saturday, November 07, 2009 Sheet 1 Rev V1.0 1 of 1 |
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